Sorry but 8 Mbyte is too much on chip cache to be credible. The 1.5 Mbyte cache in the 0.25 um PA-8500 takes up over 300 mm2. Even in 0.18 um an 8 Mbyte cache would take up ~900 mm2 or two times bigger than can fit on a stepper. The source might have meant an 8 Mbit L2 cache. Adding that size L2 to the K7 cache and shrinking it to 0.18 um would still produce a big chip for mainstream PCs but at least it is in the realm of possibility.