Comment Re:A few questions (Score 1) 111
1) There are two complete CPU cores (two FPU units per core) => 4 FPU units per chip.
2) They share a common L2 cache and it is of high enough bandwidth such that performance is not degraded.
3) It uses the copper process, but it's not the same process as the one IBM announced. This is a newer process (0.18 micron targeted instead of 0.25 micron).
2) They share a common L2 cache and it is of high enough bandwidth such that performance is not degraded.
3) It uses the copper process, but it's not the same process as the one IBM announced. This is a newer process (0.18 micron targeted instead of 0.25 micron).