There is a reason that the industry have been trending towards serial and away from parallel buses.
It's been a while since I've done an transmission line and bus design work. Let me see if I can explain this in 'lay' terms:
To implement a parallel bus, you have to have each and every wire be within a certain variance. Your driving and receiving chips also need to be able to send and receive the data within a certain variance. This is because you typically send your data, say a 32-bit word over a 32 wire bus, across the bus at the same time. If the wires (and drivers and receivers) do not match up, your data will be scrambled on the other end of the bus.
The larger your chips (because you need all the drivers and receivers to send the parallel signals) or the more wires you have, the variance between the parts becomes harder and harder to control because of manufacturing limits. The trick is to design your entire system to tolerate the variances of each individual parts so that they will still work together.
But at the same time, you want to increase the speed of the bus (because having 20,000 wires is just not so practical). This is a force in conflict with what you're trying to achieve because an increase in speed translates to less tolerance in the system for parts variance.
At some point between increasing parallelness and higher and higher speed, the increase in variance will exceed the system's tolerance, and the parallel bus becomes impossible to implement or unreliable.
This is why bus designers have been trending towards serial interfaces, because that at least takes most of these variances out of the equation (it's still there but less influential).
The other trend is clock encoding. Instead of sending bits synchronously, or sending a strobe (a separate clock) signal along with the data. Now we 'encode' the clock into the data, using encoding such as the 8B/10B encoding. The receiving circuit can then 'retrieve' the clock from the data signal (it basically allow you to identify each set of data from each clock cycle, and detect problems). Serial interfaces are also usually accompanied by training sequences at start up (may be software implemented) to adjust various parameters to make the data transmission ideal for the environment.