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Average Ratings 0 Ratings

Total
ease
features
design
support

No User Reviews. Be the first to provide a review:

Write a Review

Description

Our advanced web platform significantly enhances the productivity of chip developers and verification engineers, allowing them to design and troubleshoot at a pace ten times quicker than before. With Verilator, users can effortlessly initiate and execute thousands of tests simultaneously with just one click. It also facilitates the easy sharing of test outcomes and waveforms within the organization, allows for tagging colleagues on specific signals, and provides robust tracking of test and regression failures. By utilizing Verilator to create Dockerized simulation binaries, we efficiently distribute test executions across our computing cluster, after which we gather the results and log files and have the option to rerun any tests that failed to produce waveforms. The incorporation of Docker ensures that the test executions are both consistent and reproducible. SiLogy ultimately boosts the efficiency of chip developers by shortening the time required for design and debugging processes. Prior to the advent of SiLogy, the leading method for diagnosing a failing test entailed manually copying lines from log files, analyzing waveforms on personal machines, or rerunning simulations that could take an inordinate amount of time, often spanning several days. Now, with our platform, engineers can focus more on innovation rather than being bogged down by cumbersome debugging processes.

Description

The speed at which your product goes to manufacturing will depend on how testable your design is. Unfortunately, testing at the physical stage can't catch common mistakes that can lead to costly delays. XJTAG®, DFT Assistant integrates directly into your Altium Designer unified designer environment, running Design For Tests (DFT) checks directly on the schematic diagram. You can easily confirm that the scan chains are connected to each JTAG enabled device in your design and that each signal has been correctly connected and terminated. XJTAG®, DFT Assistant checks your JTAG-enabled devices before you finalize your layout. XJTAG®, Chain Checker helps you identify common errors and alerts you early to avoid any potential problems that could affect JTAG testing.

API Access

Has API No 

API Access

Has API No 

Screenshots View All

Screenshots View All

Integrations

Allegro X Design Platform No 
Docker Yes 
GitHub Yes 
OrCAD X No 

Integrations

Allegro X Design Platform Yes 
Docker No 
GitHub No 
OrCAD X Yes 

Pricing Details

No price information available.
Free Trial No 
Free Version No 

Pricing Details

No price information available.
Free Trial No 
Free Version Yes 

Deployment

Web-Based Yes 
On-Premises No 
iPhone App No 
iPad App No 
Android App No 
Windows No 
Mac No 
Linux No 
Chromebook No 

Deployment

Web-Based Yes 
On-Premises No 
iPhone App No 
iPad App No 
Android App No 
Windows No 
Mac No 
Linux No 
Chromebook No 

Customer Support

Business Hours No 
Live Rep (24/7) No 
Online Support Yes 

Customer Support

Business Hours No 
Live Rep (24/7) Yes 
Online Support Yes 

Types of Training

Training Docs No 
Webinars No 
Live Training (Online) Yes 
In Person No 

Types of Training

Training Docs Yes 
Webinars Yes 
Live Training (Online) No 
In Person No 

Vendor Details

Company Name

SiLogy

Founded

2023

Country

United States

Website

silogy.io

Vendor Details

Company Name

Altium

Founded

1985

Country

United States

Website

www.altium.com/products/extensions/platform-extensions/xjtag/overview

Product Features

PCB Design

3D Visualization No 
Autorouting No 
Collaboration Tools No 
Component Library No 
Design Rule Check No 
Differential Pair Routing No 
Schematic Editor No 

Product Features

PCB Design

3D Visualization No 
Autorouting No 
Collaboration Tools No 
Component Library No 
Design Rule Check No 
Differential Pair Routing No 
Schematic Editor No 

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